Methodology for Mismatch Reduction in Time-Interleaved ADCs
Soudan, Michael and Farrell, Ronan (2007) Methodology for Mismatch Reduction in Time-Interleaved ADCs. In: Proceedings of 2007 European Conference on Circuit Theory and Design, 26th - 30th August 2007, Sevilla, Spain. AbstractThis paper presents a methodology to minimize mismatch errors in time-interleaved analog-to-digital converters (ADC) by means of averaging multiple channels. A simple algorithm improving both spurious free dynamic range (SFDR) and signal-to-noise and distortion ratio (SINAD) is demonstrated. The presented technique provides robustness against inaccurately identified mismatch errors and does not require computationally expensive post-processing of the signal. | Additional Information: | Copyright Notice "©2007 IEEE. Reprinted from Proceedings of 2007 European Conference on Circuit Theory and Design Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE." http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4529605&isnumber=4529518 |
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| Keywords: | Analogue-digital conversion; Analog-to-digital converters; Mismatch reduction; Signal-to-noise and distortion ratio; Spurious free dynamic range; Time-interleaved ADC.
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| Subjects: | Science & Engineering > Electronic Engineering |
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| ID Code: | 1343 |
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| Deposited By: | Dr. Ronan Farrell |
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| Deposited On: | 25 May 2009 16:58 |
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| Refereed: | Yes |
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| URL: | http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=4529518&isYear=2007 |
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