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    Parallelization of Bandpass Sigma-Delta Modulators for Class-S Digital Power Amplifiers


    Podsiadlik, Tomasz and Dooley, John and Farrell, Ronan (2010) Parallelization of Bandpass Sigma-Delta Modulators for Class-S Digital Power Amplifiers. In: PhD Research in Microelectronics and Electronics 2010 (PRIME 2010), 18th-21st July 2010, Berlin, Germany.

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    Abstract

    In this paper a new technique of utilizing parallel sigma delta modulation for high frequency switch mode digital power amplifiers is presented. This approach allows achieving a factor of two increase of a digital logic speed for band-pass SDM with minor adjustments made. A universal scheme for a SDM system transformation is provided. Since the transformation scheme is established, a parallel low-pass SDM, expandable to a factor of four clock frequency reduction is designed. The parallelization of a low pass SDM however requires modification on the form of a Noise Transfer Function in order to preserve desired speed of a digital logic. This can affect the overall performance of the SDM. The derivation of the systems is provided through analysis of discrete time domain equations. The method is validated through simulations.

    Item Type: Conference or Workshop Item (Paper)
    Keywords: Parallelization; Bandpass Sigma-Delta Modulators; Class-S Digital Power Amplifiers;
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Item ID: 3682
    Depositing User: Ronan Farrell
    Date Deposited: 28 May 2012 11:34
    Refereed: Yes
    URI:
      Use Licence: This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here

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